Skip to content
View mmicko's full-sized avatar

Organizations

@mamedev @YosysHQ

Block or report mmicko

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results

Assembler for MSP430, dsPIC, ARM, MIPS, 65xx, 68000, 8051/8052, Atmel AVR8, and others.

C++ 305 50 Updated Mar 9, 2025

W65C832 (32 bit 6502) in an FPGA.

Verilog 6 1 Updated Mar 24, 2025

End-to-end synthesis and P&R toolchain

Rust 78 5 Updated Mar 20, 2025

System software for TIM011, a school computer from the end of 1980's made in former Yugoslavia

9 1 Updated Jul 12, 2024

An FPGA reverse engineering and documentation project

Rust 41 3 Updated Mar 23, 2025

TIM-011 B Replica Board

HTML 6 Updated Dec 15, 2024

SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows

Python 435 80 Updated Mar 14, 2025

Talos ES™ is a mini-computer, built with standard, discrete logic (74-series chips), featuring a custom RISC CPU. It's meant for education and entertainment.

C++ 32 2 Updated Mar 15, 2024

Iskra Delta Partner motherboard DIY plans and instructions

C# 1 Updated Feb 1, 2024

USB keyboard/mouse to PS/2 interface converter using a Raspberry Pi Pico

C 284 43 Updated Mar 4, 2025

USB keyboard to PS/2 / AT / XT interface converter using a Raspberry Pi Pico

C 132 25 Updated Jan 29, 2025

An 8-bit Z80 computer kit in a box

Assembly 52 4 Updated Jul 30, 2024

An attempt to reverse engineer a bitstream made for an AL3-10 FPGA

C 14 2 Updated Jan 6, 2023

Löwe FPGA Board

Verilog 12 1 Updated Oct 12, 2023

Sequence of Covers with Yosys

SystemVerilog 6 1 Updated Jan 29, 2024

Documenting Lattice's 28nm FPGA parts

Python 142 14 Updated Jan 5, 2024

MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Video Stream Over USB 3.0 with Cypress FX3. This is now Legacy …

C 413 125 Updated Jul 29, 2022

Build Customized FPGA Implementations for Vivado

Java 307 114 Updated Mar 25, 2025

Documenting the Lattice ECP5 bit-stream format.

Python 410 88 Updated Jan 11, 2025

RP2040 MCU based PMOD

HTML 20 2 Updated Nov 29, 2024

Solving the global IC shortage by reusing old stuff!

Assembly 85 10 Updated Feb 27, 2025

My Modular Z80 Homebrew Computer

GLSL 12 Updated Mar 6, 2023

24 channel, 100Msps logic analyzer hardware and software

Python 3,469 352 Updated Mar 16, 2025

Multi-platform nightly builds of open source digital design and verification tools

Shell 993 90 Updated Mar 24, 2025

Yosys Open SYnthesis Suite

C++ 3,709 922 Updated Mar 25, 2025

Serial Terminal Firmware for RP2040 Boards

C++ 20 4 Updated Sep 29, 2024

Export from Hierachical KiCad 6 schematic to Verilog

Python 3 Updated Jan 1, 2022
Next
Showing results