Skip to content

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.

License

Notifications You must be signed in to change notification settings

chiphackers/covered

Folders and files

NameName
Last commit message
Last commit date
Aug 28, 2010
Aug 5, 2010
May 23, 2010
Jul 19, 2010
Oct 18, 2018
Oct 18, 2018
Jun 13, 2009
Apr 19, 2002
Aug 2, 2009
Jun 11, 2009
Dec 3, 2009
May 23, 2010
Mar 25, 2010
May 6, 2009
Nov 19, 2008
Aug 18, 2008
May 23, 2010
Oct 17, 2009
Apr 28, 2010
Oct 17, 2009
May 23, 2010
Jan 5, 2010
May 11, 2009
Oct 17, 2009
Oct 17, 2009
Oct 17, 2009
Oct 17, 2009
May 6, 2009
Oct 29, 2002

Repository files navigation

For information regarding...

* the installation of Covered, see the INSTALL file.
* a list of the developers of Covered, see the AUTHORS file.
* the CVS change list, see the ChangeLog file.
* project-specific news, see the NEWS file.

For User documentation...

* User's Guide can be found in HTML form at ./doc/html/index.html.
* Command-line help can be found by typing "covered -h" after Covered has been installed.
* Version information about Covered can be found by typing "covered -v" after Covered
  has been installed.

For Development documentation...

* HTML and LaTex are generated (if the doxygen -- http://www.doxygen.org -- utility exists
  in the user's bin path).
* HTML format can be found at ./doc/devel/html/index.html.
* LaTex format can be found at ./doc/devel/latex
* PDF format can be generated by following the following steps:

  1.  cd doc/devel/latex
  2.  make pdf   (the PDF file will be called refman.pdf)

For GUI documentation...

* The GUI User's Guide is available in HTML form at ./doc/html/index.html.
* This documentation can also be accessed by clicking on the "Help->User Guide" menu item 

The Covered website is located... 

* For members of SourceForge, you can get the project page at
  http://sourceforge.net/projects/covered

  - can submit/review bug reports
  - get to mailing lists
  - see CVS repository
  - check out other project related stuff

* Homepage can be found at
  http://covered.sourceforge.net

About

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.

Resources

License

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published